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At F5, we strive to bring a better digital world to life. Our teams empower organizations across the globe to create, secure, and run applications that enhance how we experience our evolving digital world. We are passionate about cybersecurity, from protecting consumers from fraud to enabling companies to focus on innovation.

Everything we do centers around people. That means we obsess over how to make the lives of our customers, and their customers, better. And it means we prioritize a diverse F5 community where each individual can thrive.

Position Summary

We are looking for an experienced FPGA RTL designer to work with a dynamic System Engineering team to deliver a wide range of networking products. This position includes responsibilities for FPGA logic design, FPGA system simulation, FPGA debug, and lab validation and performance measurement. Designs are created from high level specifications that may or may not include complete details. Designs are verified through setting up simulation and lab test environments, developing and debugging test cases and enhancing code coverage to further improve design robustness and quality.

This position collaborates with project team members (Product Managers, Architects, Analysts, Software Engineers, Project Managers, etc.) to ensure development and implementation of data driven solutions.

Primary Responsibilities

• HDL code development, complex logic design, partitioning, and RTL code development
• Verify designs by developing and executing functional test environments
• Contribute to the creation and integration of highly complex logic modules
• Analyze design operation data, conduct experimental tests, evaluates results, and produces performance documentation.
• Present technical solutions, capabilities, considerations, and features in business terms.
• Effectively communicate status, issues, and risks in a precise and timely manner.
• Partner with senior technical staff and management to break down tasks, provide estimates, and discuss tradeoffs.
• Writes technical documentation for internal and/or external consumption, for developers of varying skill level.
• Provide technical guidance to junior Engineers
• Responsible for upholding F5s Business Code of Ethics and for promptly reporting violations of the Code or other company policies.

• Perform other related duties as assigned.

   

The Job Description is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change.

Knowledge, Skills and Abilities

• Ability to use professional concepts, positive teammate
• Must be able to apply company policies and procedures to resolve complex issues in creative and effective ways
• Excellent verbal and written communication skills required
• Strong knowledge in FPGA development and debug tools required
• Strong knowledge of System Verilog RTL language required
• Networking knowledge is a plus
• Knowledge of high speed FPGA interfaces a plus (PCIe, Ethernet MACs, GCI, AXI)
• Knowledge of memory interfaces and memory structures is a plus
• Knowledge of lab tools; bus analyzer, oscilloscope, logic analyzer, IXIA traffic generators a plus

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``` - Duties require the ability to utilize a computer, read printed material, and communicate over email, MS Teams, Zoom calls, etc.

Duties may require being on call periodically or working outside normal working hours (evenings and weekends). Duties may require the ability to travel via a